Generally, the trend in electronic components is to process the data with low-power consumption, high performance and high-capacity. The fact is that the user's commands for the high-capacity data processing provoke an increment in power consumption of the electronic device.
To process a huge amount of data at once, the capacity of the input and output buffers, which corresponds to such a huge amount of data, is to be increased. Further, since the data output device of the semiconductor memory has data bus structures such as X8, X16, X32 and so on, the data output device is given a great deal of weight on the amount of power consumption.
Meanwhile, the memory manufacturer designs a scheme capable of supporting all of the data bus structures of X8, X16 and X32 and makes the memory device operate in one of input/output (I/O) modes of X8, X16 and X32 through an option treatment based on the user's demand.
In order to achieve this operation features, the memory device has a data output multiplexer and the data output multiplexer transfers data on global I/O lines (GIO) to a pipe line latch according to address Information and the I/O modes of X8, X16 and X32.
FIG. 1 is a block diagram Illustrating a conventional data output control circuit and FIG. 2 is a circuit diagram illustrating a decoder shown in the conventional data output control circuit of FIG. 1.
Referring to FIG. 1, the conventional data output control circuit includes a decoder 1, which produces driving signals LAY9C<0:3> in response to address level signals AT9 and AT12, and a data output multiplexer 2 which transfers data on global I/O lines to a pipe line latch circuit (not shown) in response to the driving signals LAY9C<0:3>.
Referring to FIG. 2, the decoder 1 decodes the address level signals AT9 and AT12 and produces the driving signals LAY9C<0:3> to drive the data output multiplexer 2. That is, the conventional data output control circuit enables one of the driving signals LAY9C<0:3> to a high level, regardless of a bank active operation.
Accordingly, the conventional data output control circuit has a problem in that current consumption is caused when the data on the global I/O lines are transmitted because the data output multiplexer in a nonselective bank is driven.